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Commits
| Author | SHA1 | Date | |
|---|---|---|---|
 Michal Kubecek
|
00a967877d |
No files matched your search
@@ -148,7 +148,7 @@ PtrToVA64(void const *ptr) // IN
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* the NT specific VMX86_DRIVER_VERSION.
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*/
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#define VMMON_VERSION (392 << 16 | 0)
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#define VMMON_VERSION (393 << 16 | 0)
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#define VMMON_VERSION_MAJOR(v) ((uint32) (v) >> 16)
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#define VMMON_VERSION_MINOR(v) ((uint16) (v))
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@@ -1,5 +1,5 @@
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/*********************************************************
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* Copyright (C) 1998-2014,2016-2017,2019 VMware, Inc. All rights reserved.
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* Copyright (C) 1998-2014,2016-2020 VMware, Inc. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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@@ -417,31 +417,13 @@ _BUILD_GET_CR(_GET_CR8, 8);
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static INLINE void
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_Set_GDT(_GETSET_DTR_TYPE *dtr)
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{
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#ifdef VM_X86_64
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_lgdt(dtr);
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#else
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/*
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* timetools 32-bit targets use an old version of MSVC that doesn't support
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* the _lgdt intrinsic. Luckily, 32-bit still supports inline asm.
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*/
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__asm mov eax, dtr
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__asm lgdt [eax]
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#endif
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}
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static INLINE void
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_Get_GDT(_GETSET_DTR_TYPE *dtr)
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{
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#ifdef VM_X86_64
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_sgdt(dtr);
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#else
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/*
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* timetools 32-bit targets use an old version of MSVC that doesn't support
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* the _sgdt intrinsic. Luckily, 32-bit still supports inline asm.
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*/
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__asm mov eax, dtr
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__asm sgdt [eax]
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#endif
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}
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static INLINE void
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@@ -466,141 +448,6 @@ _Get_IDT(_GETSET_DTR_TYPE *dtr)
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#define RESTORE_FLAGS(x) __writeeflags(x)
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#ifdef VM_X86_32
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#define SET_TR(_tr) _Set_TR(_tr)
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#define SET_LDT(_tr) _Set_LDT(_tr)
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#define GET_TR(_tr) do { _tr = _Get_TR(); } while (0)
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#define GET_LDT(_tr) do { _tr = _Get_LDT(); } while (0)
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#define SET_CR2(_reg) __asm mov eax, _reg __asm mov cr2, eax
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#define CLTS() __asm clts
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#define FNCLEX() __asm fnclex
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#define TLB_INVALIDATE_PAGE(_addr) { \
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void *_a = (_addr); \
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__asm mov eax, _a __asm invlpg [eax] \
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}
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#define RAISE_INTERRUPT(_x) {__asm int _x }
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#define RETURN_FROM_INT() {__asm iretd }
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static INLINE void
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SET_DS(Selector val)
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{
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__asm mov ax, val
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__asm mov ds, ax
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}
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static INLINE void
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SET_ES(Selector val)
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{
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__asm mov ax, val
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__asm mov es, ax
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}
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static INLINE void
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SET_FS(Selector val)
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{
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__asm mov ax, val
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__asm mov fs, ax
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}
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static INLINE void
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SET_GS(Selector val)
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{
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__asm mov ax, val
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__asm mov gs, ax
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}
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static INLINE void
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SET_SS(Selector val)
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{
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__asm mov ax, val
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__asm mov ss, ax
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}
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static INLINE Selector
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GET_FS(void)
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{
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Selector _v;
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__asm mov _v,fs
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return _v;
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}
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static INLINE Selector
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GET_GS(void)
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{
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Selector _v;
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__asm mov _v,gs
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return _v;
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}
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static INLINE Selector
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GET_DS(void)
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{
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Selector _v;
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__asm mov _v,ds
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return _v;
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}
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static INLINE Selector
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GET_ES(void)
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{
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Selector _v;
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__asm mov _v,es
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return _v;
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}
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static INLINE Selector
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GET_SS(void)
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{
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Selector _v;
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__asm mov _v,ss
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return _v;
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}
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static INLINE Selector
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GET_CS(void)
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{
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Selector _v;
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__asm mov _v,cs
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return _v;
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}
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static INLINE void
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_Set_LDT(Selector val)
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{
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__asm lldt val
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}
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static INLINE void
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_Set_TR(Selector val)
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{
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__asm ltr val
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}
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static INLINE Selector
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_Get_LDT(void)
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{
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Selector sel;
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__asm sldt sel
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return sel;
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}
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static INLINE Selector
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_Get_TR(void)
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{
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Selector sel;
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__asm str sel
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return sel;
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}
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#endif /* !VM_X86_32 */
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#endif /* !__GNUC__ && !_MSC_VER */
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@@ -680,7 +527,7 @@ INTERRUPTS_ENABLED(void)
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#endif
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#if defined (__GNUC__) || (defined (_MSC_VER) && defined (VM_X86_32))
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#if defined (__GNUC__)
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static INLINE unsigned
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CURRENT_CPL(void)
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{
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@@ -166,17 +166,14 @@ long _InterlockedCompareExchange(long volatile*, long, long);
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long _InterlockedExchangeAdd(long volatile*, long);
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long _InterlockedDecrement(long volatile*);
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long _InterlockedIncrement(long volatile*);
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char _InterlockedExchange8(char volatile *, char);
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char _InterlockedCompareExchange8(char volatile *, char, char);
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__int64 _InterlockedCompareExchange64(__int64 volatile*, __int64, __int64);
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#pragma intrinsic(_InterlockedExchange, _InterlockedCompareExchange)
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#pragma intrinsic(_InterlockedExchangeAdd, _InterlockedDecrement)
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#pragma intrinsic(_InterlockedIncrement)
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#pragma intrinsic(_InterlockedCompareExchange64)
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# if _MSC_VER >= 1600
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char _InterlockedExchange8(char volatile *, char);
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char _InterlockedCompareExchange8(char volatile *, char, char);
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#pragma intrinsic(_InterlockedCompareExchange8, _InterlockedCompareExchange8)
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#endif
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#pragma intrinsic(_InterlockedCompareExchange64)
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#if defined VM_X86_64
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long _InterlockedAnd(long volatile*, long);
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@@ -255,15 +252,6 @@ Atomic_VolatileToAtomic64(volatile uint64 *var) // IN:
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* registers.
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*/
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#if defined _MSC_VER && _MSC_VER < 1600 && defined __x86_64__
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uint8 VMWInterlockedExchange8(uint8 volatile *ptr,
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uint8 val);
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uint8 VMWInterlockedCompareExchange8(uint8 volatile *ptr,
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uint8 newVal,
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uint8 oldVal);
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#endif
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#if defined __GNUC__ && defined VM_ARM_32
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/* Force the link step to fail for unimplemented functions. */
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extern int AtomicUndefined(void const *);
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@@ -405,19 +393,8 @@ Atomic_ReadWrite8(Atomic_uint8 *var, // IN/OUT:
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: "memory"
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);
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return val;
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#elif defined _MSC_VER && _MSC_VER >= 1600
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#elif defined _MSC_VER
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return _InterlockedExchange8((volatile char *)&var->value, val);
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#elif defined _MSC_VER && defined __i386__
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#pragma warning(push)
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#pragma warning(disable : 4035) // disable no-return warning
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{
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__asm movzx eax, val
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__asm mov ebx, var
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__asm xchg [ebx]Atomic_uint8.value, al
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}
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#pragma warning(pop)
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#elif defined _MSC_VER && defined __x86_64__
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return VMWInterlockedExchange8(&var->value, val);
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#else
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#error No compiler defined for Atomic_ReadWrite8
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#endif
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@@ -500,23 +477,9 @@ Atomic_ReadIfEqualWrite8(Atomic_uint8 *var, // IN/OUT:
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);
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return val;
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#elif defined _MSC_VER && _MSC_VER >= 1600
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#elif defined _MSC_VER
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return _InterlockedCompareExchange8((volatile char *)&var->value,
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newVal, oldVal);
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#elif defined _MSC_VER && defined __i386__
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#pragma warning(push)
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#pragma warning(disable : 4035) // disable no-return warning
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{
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__asm mov al, oldVal
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__asm mov ebx, var
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__asm mov cl, newVal
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__asm lock cmpxchg [ebx]Atomic_uint8.value, cl
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__asm movzx eax, al
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// eax is the return value, this is documented to work - edward
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}
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#pragma warning(pop)
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#elif defined _MSC_VER && defined __x86_64__
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return VMWInterlockedCompareExchange8(&var->value, newVal, oldVal);
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#else
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#error No compiler defined for Atomic_ReadIfEqualWrite8
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#endif
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@@ -699,11 +699,11 @@ typedef void * UserVA;
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#endif
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/*
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* Similarly, we require a compiler that is at least vc90 (vs2008).
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* Similarly, we require a compiler that is at least vs2012.
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* Enforce this here.
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*/
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#if defined _MSC_VER && _MSC_VER < 1500
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#error "cl.exe version is too old, need vc90 or better"
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#if defined _MSC_VER && _MSC_VER < 1700
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#error "cl.exe version is too old, need vs2012 or better"
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#endif
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@@ -481,7 +481,7 @@ FIELD( 6, 0, EDX, 16, 16, HW_FEEDBACK_INDEX, NO, 0 )
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/* LEVEL, SUB-LEVEL, REG, POS, SIZE, NAME, MON SUPP, HWV */
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#define CPUID_FIELD_DATA_LEVEL_7 \
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FIELD( 7, 0, EAX, 0, 32, LEAF_7_MAX_SUBLEVEL, YES, FUT ) \
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FIELD( 7, 0, EAX, 0, 32, LEAF_7_MAX_SUBLEVEL, YES, 18 ) \
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FLAG( 7, 0, EBX, 0, 1, FSGSBASE, YES, 9 ) \
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FLAG( 7, 0, EBX, 1, 1, TSC_ADJUST, ANY, 11 ) \
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FLAG( 7, 0, EBX, 2, 1, SGX, ANY, 17 ) \
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@@ -530,18 +530,20 @@ FLAG( 7, 0, ECX, 14, 1, AVX512VPOPCNTDQ, YES, 16 ) \
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FLAG( 7, 0, ECX, 16, 1, VA57, NO, 0 ) \
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FIELD( 7, 0, ECX, 17, 5, MAWA, NO, 0 ) \
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FLAG( 7, 0, ECX, 22, 1, RDPID, YES, 17 ) \
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FLAG( 7, 0, ECX, 25, 1, CLDEMOTE, YES, FUT ) \
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FLAG( 7, 0, ECX, 27, 1, MOVDIRI, YES, FUT ) \
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FLAG( 7, 0, ECX, 28, 1, MOVDIR64B, YES, FUT ) \
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FLAG( 7, 0, ECX, 25, 1, CLDEMOTE, YES, 18 ) \
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FLAG( 7, 0, ECX, 27, 1, MOVDIRI, YES, 18 ) \
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FLAG( 7, 0, ECX, 28, 1, MOVDIR64B, YES, 18 ) \
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FLAG( 7, 0, ECX, 29, 1, ENQCMD, NO, 0 ) \
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FLAG( 7, 0, ECX, 30, 1, SGX_LC, ANY, 17 ) \
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FLAG( 7, 0, EDX, 2, 1, AVX512QVNNIW, YES, 16 ) \
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FLAG( 7, 0, EDX, 3, 1, AVX512QFMAPS, YES, 16 ) \
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FLAG( 7, 0, EDX, 4, 1, FAST_SHORT_REPMOV, YES, FUT ) \
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FLAG( 7, 0, EDX, 8, 1, AVX512VP2INTERSECT, YES, FUT ) \
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FLAG( 7, 0, EDX, 4, 1, FAST_SHORT_REPMOV, YES, 18 ) \
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FLAG( 7, 0, EDX, 8, 1, AVX512VP2INTERSECT, YES, 18 ) \
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FLAG( 7, 0, EDX, 10, 1, MDCLEAR, YES, 9 ) \
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FLAG( 7, 0, EDX, 13, 1, TSX_MICROCODE_UPDATE, NO, 0 ) \
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FLAG( 7, 0, EDX, 14, 1, SERIALIZE, NO, 0 ) \
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FLAG( 7, 0, EDX, 15, 1, HYBRID, NO, 0 ) \
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FLAG( 7, 0, EDX, 16, 1, TSXLDTRK, NO, 0 ) \
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FLAG( 7, 0, EDX, 18, 1, PCONFIG, NO, 0 ) \
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FLAG( 7, 0, EDX, 20, 1, CET_IBT, NO, 0 ) \
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FLAG( 7, 0, EDX, 26, 1, IBRSIBPB, ANY, 9 ) \
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@@ -550,7 +552,7 @@ FLAG( 7, 0, EDX, 28, 1, FCMD, YES, 9 ) \
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FLAG( 7, 0, EDX, 29, 1, ARCH_CAPABILITIES, ANY, 9 ) \
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FLAG( 7, 0, EDX, 30, 1, CORE_CAPABILITIES, NO, 0 ) \
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FLAG( 7, 0, EDX, 31, 1, SSBD, YES, 9 ) \
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FLAG( 7, 1, EAX, 5, 1, AVX512BF16, YES, FUT )
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FLAG( 7, 1, EAX, 5, 1, AVX512BF16, YES, 18 )
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/* LEVEL, SUB-LEVEL, REG, POS, SIZE, NAME, MON SUPP, HWV */
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#define CPUID_FIELD_DATA_LEVEL_9 \
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@@ -521,9 +521,13 @@ MSRQuery;
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/* SEV related MSRs. */
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#define MSR_VMPAGE_FLUSH 0xc001011e
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#define MSR_GHCB_PA 0xc0010130
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#define MSR_GHCB_PA_FUNCTION_MASK 0xfff
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#define MSR_GHCB_PA_SEVINFO_HV 1
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#define MSR_GHCB_PA_SEVINFO_REQ 2
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#define MSR_GHCB_PA_AP_JUMP_TABLE 3
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#define MSR_GHCB_PA_CPUID_REQ 4
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#define MSR_GHCB_PA_CPUID_RESP 5
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#define MSR_GHCB_PA_TERMINATE 256
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#define MSR_SEV_STATUS 0xc0010131
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#define MSR_SEV_STATUS_SEV_EN 0x0000000000000001ULL // SEV is enabled
|
||||
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||||
@@ -1,5 +1,5 @@
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||||
/*********************************************************
|
||||
* Copyright (C) 2015-2018 VMware, Inc. All rights reserved.
|
||||
* Copyright (C) 2015-2020 VMware, Inc. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
@@ -95,9 +95,10 @@
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* _V -- virtualized
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* _NV -- not virtualized
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* _access is one of:
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* _NA -- no access
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* _RW -- read/write access
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* _RO -- read-only access
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||||
* _NA -- no access
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* _RW -- read/write access
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* _RO -- read-only access
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* _URW -- read/write acess for the ULM only
|
||||
* _sticky is one of:
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* _S -- sticky
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||||
* _NS -- non-sticky
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||||
@@ -109,9 +110,9 @@
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VMCS_SET_START(16)
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/* 16-bit control fields. */
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VMCS_GROUP_START(16, CTL)
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VMCS_FIELD(VPID, 0x0000, _S16, _TC, 0, _C, _V, _NA, _S)
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VMCS_FIELD(PI_NOTIFY, 0x0002, _S16, _TC, 1, _NC, _NV, _NA, _S)
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||||
VMCS_FIELD(EPTP_INDEX, 0x0004, _S16, _TC, 2, _NC, _V, _NA, _NS)
|
||||
VMCS_FIELD(VPID, 0x0000, _S16, _TC, 0, _C, _V, _URW, _S)
|
||||
VMCS_FIELD(PI_NOTIFY, 0x0002, _S16, _TC, 1, _NC, _NV, _NA, _S)
|
||||
VMCS_FIELD(EPTP_INDEX, 0x0004, _S16, _TC, 2, _NC, _V, _URW, _NS)
|
||||
VMCS_UNUSED( 0x0006, _S16, _TC, 3)
|
||||
VMCS_UNUSED( 0x0008, _S16, _TC, 4)
|
||||
VMCS_UNUSED( 0x000A, _S16, _TC, 5)
|
||||
@@ -328,16 +329,16 @@ VMCS_GROUP_END(64, DATA)
|
||||
|
||||
/* 64-bit guest state. */
|
||||
VMCS_GROUP_START(64, GUEST)
|
||||
VMCS_FIELD(LINK_PTR, 0x2800, _S64, _TG, 0, _NC, _V, _NA, _NS)
|
||||
VMCS_FIELD(DEBUGCTL, 0x2802, _S64, _TG, 1, _NC, _V, _NA, _NS)
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||||
VMCS_FIELD(PAT, 0x2804, _S64, _TG, 2, _NC, _V, _NA, _NS)
|
||||
VMCS_FIELD(EFER, 0x2806, _S64, _TG, 3, _NC, _V, _NA, _NS)
|
||||
VMCS_FIELD(PGC, 0x2808, _S64, _TG, 4, _NC, _V, _NA, _NS)
|
||||
VMCS_FIELD(PDPTE0, 0x280A, _S64, _TG, 5, _NC, _V, _RW, _NS)
|
||||
VMCS_FIELD(PDPTE1, 0x280C, _S64, _TG, 6, _NC, _V, _RW, _NS)
|
||||
VMCS_FIELD(PDPTE2, 0x280E, _S64, _TG, 7, _NC, _V, _RW, _NS)
|
||||
VMCS_FIELD(PDPTE3, 0x2810, _S64, _TG, 8, _NC, _V, _RW, _NS)
|
||||
VMCS_FIELD(BNDCFGS, 0x2812, _S64, _TG, 9, _NC, _V, _NA, _NS)
|
||||
VMCS_FIELD(LINK_PTR, 0x2800, _S64, _TG, 0, _NC, _V, _NA, _NS)
|
||||
VMCS_FIELD(DEBUGCTL, 0x2802, _S64, _TG, 1, _NC, _V, _NA, _NS)
|
||||
VMCS_FIELD(PAT, 0x2804, _S64, _TG, 2, _NC, _V, _NA, _NS)
|
||||
VMCS_FIELD(EFER, 0x2806, _S64, _TG, 3, _NC, _V, _URW, _NS)
|
||||
VMCS_FIELD(PGC, 0x2808, _S64, _TG, 4, _NC, _V, _NA, _NS)
|
||||
VMCS_FIELD(PDPTE0, 0x280A, _S64, _TG, 5, _NC, _V, _RW, _NS)
|
||||
VMCS_FIELD(PDPTE1, 0x280C, _S64, _TG, 6, _NC, _V, _RW, _NS)
|
||||
VMCS_FIELD(PDPTE2, 0x280E, _S64, _TG, 7, _NC, _V, _RW, _NS)
|
||||
VMCS_FIELD(PDPTE3, 0x2810, _S64, _TG, 8, _NC, _V, _RW, _NS)
|
||||
VMCS_FIELD(BNDCFGS, 0x2812, _S64, _TG, 9, _NC, _V, _NA, _NS)
|
||||
VMCS_UNUSED( 0x2814, _S64, _TG, 10)
|
||||
VMCS_UNUSED( 0x2816, _S64, _TG, 11)
|
||||
VMCS_UNUSED( 0x2818, _S64, _TG, 12)
|
||||
@@ -403,24 +404,24 @@ VMCS_SET_END(64)
|
||||
VMCS_SET_START(32)
|
||||
/* 32-bit control fields. */
|
||||
VMCS_GROUP_START(32, CTL)
|
||||
VMCS_FIELD(PIN_VMEXEC_CTL, 0x4000, _S32, _TC, 0, _C, _V, _NA, _S)
|
||||
VMCS_FIELD(CPU_VMEXEC_CTL, 0x4002, _S32, _TC, 1, _C, _V, _NA, _S)
|
||||
VMCS_FIELD(XCP_BITMAP, 0x4004, _S32, _TC, 2, _NC, _V, _NA, _S)
|
||||
VMCS_FIELD(PF_ERR_MASK, 0x4006, _S32, _TC, 3, _NC, _V, _NA, _S)
|
||||
VMCS_FIELD(PF_ERR_MATCH, 0x4008, _S32, _TC, 4, _NC, _V, _NA, _S)
|
||||
VMCS_FIELD(CR3_TARG_COUNT, 0x400A, _S32, _TC, 5, _NC, _V, _NA, _S)
|
||||
VMCS_FIELD(VMEXIT_CTL, 0x400C, _S32, _TC, 6, _NC, _V, _NA, _S)
|
||||
VMCS_FIELD(VMEXIT_MSR_STORE_COUNT, 0x400E, _S32, _TC, 7, _NC, _V, _NA, _S)
|
||||
VMCS_FIELD(VMEXIT_MSR_LOAD_COUNT, 0x4010, _S32, _TC, 8, _NC, _V, _NA, _S)
|
||||
VMCS_FIELD(VMENTRY_CTL, 0x4012, _S32, _TC, 9, _NC, _V, _NA, _S)
|
||||
VMCS_FIELD(VMENTRY_MSR_LOAD_COUNT, 0x4014, _S32, _TC, 10, _NC, _V, _NA, _S)
|
||||
VMCS_FIELD(VMENTRY_INTR_INFO, 0x4016, _S32, _TC, 11, _NC, _V, _NA, _NS)
|
||||
VMCS_FIELD(VMENTRY_XCP_ERR, 0x4018, _S32, _TC, 12, _NC, _V, _NA, _S)
|
||||
VMCS_FIELD(VMENTRY_INSTR_LEN, 0x401A, _S32, _TC, 13, _NC, _V, _NA, _S)
|
||||
VMCS_FIELD(TPR_THRESHOLD, 0x401C, _S32, _TC, 14, _C, _V, _NA, _S)
|
||||
VMCS_FIELD(2ND_VMEXEC_CTL, 0x401E, _S32, _TC, 15, _C, _V, _NA, _S)
|
||||
VMCS_FIELD(PAUSE_LOOP_GAP, 0x4020, _S32, _TC, 16, _NC, _V, _NA, _S)
|
||||
VMCS_FIELD(PAUSE_LOOP_WINDOW, 0x4022, _S32, _TC, 17, _NC, _V, _NA, _S)
|
||||
VMCS_FIELD(PIN_VMEXEC_CTL, 0x4000, _S32, _TC, 0, _C, _V, _URW, _S)
|
||||
VMCS_FIELD(CPU_VMEXEC_CTL, 0x4002, _S32, _TC, 1, _C, _V, _URW, _S)
|
||||
VMCS_FIELD(XCP_BITMAP, 0x4004, _S32, _TC, 2, _NC, _V, _URW, _S)
|
||||
VMCS_FIELD(PF_ERR_MASK, 0x4006, _S32, _TC, 3, _NC, _V, _NA, _S)
|
||||
VMCS_FIELD(PF_ERR_MATCH, 0x4008, _S32, _TC, 4, _NC, _V, _NA, _S)
|
||||
VMCS_FIELD(CR3_TARG_COUNT, 0x400A, _S32, _TC, 5, _NC, _V, _NA, _S)
|
||||
VMCS_FIELD(VMEXIT_CTL, 0x400C, _S32, _TC, 6, _NC, _V, _URW, _S)
|
||||
VMCS_FIELD(VMEXIT_MSR_STORE_COUNT, 0x400E, _S32, _TC, 7, _NC, _V, _NA, _S)
|
||||
VMCS_FIELD(VMEXIT_MSR_LOAD_COUNT, 0x4010, _S32, _TC, 8, _NC, _V, _NA, _S)
|
||||
VMCS_FIELD(VMENTRY_CTL, 0x4012, _S32, _TC, 9, _NC, _V, _URW, _S)
|
||||
VMCS_FIELD(VMENTRY_MSR_LOAD_COUNT, 0x4014, _S32, _TC, 10, _NC, _V, _NA, _S)
|
||||
VMCS_FIELD(VMENTRY_INTR_INFO, 0x4016, _S32, _TC, 11, _NC, _V, _URW, _NS)
|
||||
VMCS_FIELD(VMENTRY_XCP_ERR, 0x4018, _S32, _TC, 12, _NC, _V, _URW, _S)
|
||||
VMCS_FIELD(VMENTRY_INSTR_LEN, 0x401A, _S32, _TC, 13, _NC, _V, _URW, _S)
|
||||
VMCS_FIELD(TPR_THRESHOLD, 0x401C, _S32, _TC, 14, _C, _V, _NA, _S)
|
||||
VMCS_FIELD(2ND_VMEXEC_CTL, 0x401E, _S32, _TC, 15, _C, _V, _URW, _S)
|
||||
VMCS_FIELD(PAUSE_LOOP_GAP, 0x4020, _S32, _TC, 16, _NC, _V, _NA, _S)
|
||||
VMCS_FIELD(PAUSE_LOOP_WINDOW, 0x4022, _S32, _TC, 17, _NC, _V, _NA, _S)
|
||||
VMCS_UNUSED( 0x4024, _S32, _TC, 18)
|
||||
VMCS_UNUSED( 0x4026, _S32, _TC, 19)
|
||||
VMCS_UNUSED( 0x4028, _S32, _TC, 20)
|
||||
@@ -551,14 +552,14 @@ VMCS_SET_END(32)
|
||||
VMCS_SET_START(NAT)
|
||||
/* natural-width control fields. */
|
||||
VMCS_GROUP_START(NAT, CTL)
|
||||
VMCS_FIELD(CR0_GHMASK, 0x6000, _SN, _TC, 0, _C, _V, _NA, _S)
|
||||
VMCS_FIELD(CR4_GHMASK, 0x6002, _SN, _TC, 1, _C, _V, _NA, _S)
|
||||
VMCS_FIELD(CR0_SHADOW, 0x6004, _SN, _TC, 2, _NC, _V, _NA, _S)
|
||||
VMCS_FIELD(CR4_SHADOW, 0x6006, _SN, _TC, 3, _NC, _V, _NA, _S)
|
||||
VMCS_FIELD(CR3_TARGVAL0, 0x6008, _SN, _TC, 4, _NC, _V, _NA, _S)
|
||||
VMCS_FIELD(CR3_TARGVAL1, 0x600A, _SN, _TC, 5, _NC, _V, _NA, _S)
|
||||
VMCS_FIELD(CR3_TARGVAL2, 0x600C, _SN, _TC, 6, _NC, _V, _NA, _S)
|
||||
VMCS_FIELD(CR3_TARGVAL3, 0x600E, _SN, _TC, 7, _NC, _V, _NA, _S)
|
||||
VMCS_FIELD(CR0_GHMASK, 0x6000, _SN, _TC, 0, _C, _V, _URW, _S)
|
||||
VMCS_FIELD(CR4_GHMASK, 0x6002, _SN, _TC, 1, _C, _V, _URW, _S)
|
||||
VMCS_FIELD(CR0_SHADOW, 0x6004, _SN, _TC, 2, _NC, _V, _NA, _S)
|
||||
VMCS_FIELD(CR4_SHADOW, 0x6006, _SN, _TC, 3, _NC, _V, _NA, _S)
|
||||
VMCS_FIELD(CR3_TARGVAL0, 0x6008, _SN, _TC, 4, _NC, _V, _NA, _S)
|
||||
VMCS_FIELD(CR3_TARGVAL1, 0x600A, _SN, _TC, 5, _NC, _V, _NA, _S)
|
||||
VMCS_FIELD(CR3_TARGVAL2, 0x600C, _SN, _TC, 6, _NC, _V, _NA, _S)
|
||||
VMCS_FIELD(CR3_TARGVAL3, 0x600E, _SN, _TC, 7, _NC, _V, _NA, _S)
|
||||
VMCS_UNUSED( 0x6010, _SN, _TC, 8)
|
||||
VMCS_UNUSED( 0x6012, _SN, _TC, 9)
|
||||
VMCS_UNUSED( 0x6014, _SN, _TC, 10)
|
||||
|
||||
+5
-42
@@ -166,17 +166,14 @@ long _InterlockedCompareExchange(long volatile*, long, long);
|
||||
long _InterlockedExchangeAdd(long volatile*, long);
|
||||
long _InterlockedDecrement(long volatile*);
|
||||
long _InterlockedIncrement(long volatile*);
|
||||
char _InterlockedExchange8(char volatile *, char);
|
||||
char _InterlockedCompareExchange8(char volatile *, char, char);
|
||||
__int64 _InterlockedCompareExchange64(__int64 volatile*, __int64, __int64);
|
||||
#pragma intrinsic(_InterlockedExchange, _InterlockedCompareExchange)
|
||||
#pragma intrinsic(_InterlockedExchangeAdd, _InterlockedDecrement)
|
||||
#pragma intrinsic(_InterlockedIncrement)
|
||||
#pragma intrinsic(_InterlockedCompareExchange64)
|
||||
|
||||
# if _MSC_VER >= 1600
|
||||
char _InterlockedExchange8(char volatile *, char);
|
||||
char _InterlockedCompareExchange8(char volatile *, char, char);
|
||||
#pragma intrinsic(_InterlockedCompareExchange8, _InterlockedCompareExchange8)
|
||||
#endif
|
||||
#pragma intrinsic(_InterlockedCompareExchange64)
|
||||
|
||||
#if defined VM_X86_64
|
||||
long _InterlockedAnd(long volatile*, long);
|
||||
@@ -255,15 +252,6 @@ Atomic_VolatileToAtomic64(volatile uint64 *var) // IN:
|
||||
* registers.
|
||||
*/
|
||||
|
||||
#if defined _MSC_VER && _MSC_VER < 1600 && defined __x86_64__
|
||||
uint8 VMWInterlockedExchange8(uint8 volatile *ptr,
|
||||
uint8 val);
|
||||
|
||||
uint8 VMWInterlockedCompareExchange8(uint8 volatile *ptr,
|
||||
uint8 newVal,
|
||||
uint8 oldVal);
|
||||
#endif
|
||||
|
||||
#if defined __GNUC__ && defined VM_ARM_32
|
||||
/* Force the link step to fail for unimplemented functions. */
|
||||
extern int AtomicUndefined(void const *);
|
||||
@@ -405,19 +393,8 @@ Atomic_ReadWrite8(Atomic_uint8 *var, // IN/OUT:
|
||||
: "memory"
|
||||
);
|
||||
return val;
|
||||
#elif defined _MSC_VER && _MSC_VER >= 1600
|
||||
#elif defined _MSC_VER
|
||||
return _InterlockedExchange8((volatile char *)&var->value, val);
|
||||
#elif defined _MSC_VER && defined __i386__
|
||||
#pragma warning(push)
|
||||
#pragma warning(disable : 4035) // disable no-return warning
|
||||
{
|
||||
__asm movzx eax, val
|
||||
__asm mov ebx, var
|
||||
__asm xchg [ebx]Atomic_uint8.value, al
|
||||
}
|
||||
#pragma warning(pop)
|
||||
#elif defined _MSC_VER && defined __x86_64__
|
||||
return VMWInterlockedExchange8(&var->value, val);
|
||||
#else
|
||||
#error No compiler defined for Atomic_ReadWrite8
|
||||
#endif
|
||||
@@ -500,23 +477,9 @@ Atomic_ReadIfEqualWrite8(Atomic_uint8 *var, // IN/OUT:
|
||||
);
|
||||
|
||||
return val;
|
||||
#elif defined _MSC_VER && _MSC_VER >= 1600
|
||||
#elif defined _MSC_VER
|
||||
return _InterlockedCompareExchange8((volatile char *)&var->value,
|
||||
newVal, oldVal);
|
||||
#elif defined _MSC_VER && defined __i386__
|
||||
#pragma warning(push)
|
||||
#pragma warning(disable : 4035) // disable no-return warning
|
||||
{
|
||||
__asm mov al, oldVal
|
||||
__asm mov ebx, var
|
||||
__asm mov cl, newVal
|
||||
__asm lock cmpxchg [ebx]Atomic_uint8.value, cl
|
||||
__asm movzx eax, al
|
||||
// eax is the return value, this is documented to work - edward
|
||||
}
|
||||
#pragma warning(pop)
|
||||
#elif defined _MSC_VER && defined __x86_64__
|
||||
return VMWInterlockedCompareExchange8(&var->value, newVal, oldVal);
|
||||
#else
|
||||
#error No compiler defined for Atomic_ReadIfEqualWrite8
|
||||
#endif
|
||||
|
||||
@@ -699,11 +699,11 @@ typedef void * UserVA;
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Similarly, we require a compiler that is at least vc90 (vs2008).
|
||||
* Similarly, we require a compiler that is at least vs2012.
|
||||
* Enforce this here.
|
||||
*/
|
||||
#if defined _MSC_VER && _MSC_VER < 1500
|
||||
#error "cl.exe version is too old, need vc90 or better"
|
||||
#if defined _MSC_VER && _MSC_VER < 1700
|
||||
#error "cl.exe version is too old, need vs2012 or better"
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
Reference in new issue
Block a user