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Author SHA1 Message Date
Michal Kubecek d15e5dded5 vmmon: quick workaround for objtool warnings
As discussed in

  https://bugzilla.suse.com/show_bug.cgi?id=1059674

the reason for multiple objtool warnings is the fact that vmmon module
defines its own Panic() function which never returns. While it is marked as
such which is used by the compiler for optimization, there is no way to
find this from object file.

While this seems innocuous, it might result in problems with unwinder
later. The quickest way around is to replace vmmon's own Panic() with
standard kernel panic() until a cleaner solution is found.
2018-11-12 07:56:32 +01:00
Michal Kubecek af645b1154 vmmon: use standard definition of CR3_PCID_MASK if available
The CR3_PCID_MASK is defined in mainline asm/processor-flags.h since
commit 6c690ee1039b ("x86/mm: Split read_cr3() into read_cr3_pa() and
__read_cr3()") in v4.13-rc1.
2018-11-12 07:56:16 +01:00
Michal Kubecek 7b5b2e3c4c vmmon: use standard definition of MSR_MISC_FEATURES_ENABLES if available
The MSR_MISC_FEATURES_ENABLES macro is defined in mainline since commit
ab6d9468631a ("x86/msr: Rename MISC_FEATURE_ENABLES to
MISC_FEATURES_ENABLES") in v4.12-rc1.

The MSR_MISC_FEATURES_ENABLES_CPUID_FAULT macro is defined in mainline
since commit e9ea1e7f53b8 ("x86/arch_prctl: Add ARCH_[GET|SET]_CPUID") in
v4.12-rc1.
2018-11-12 07:56:05 +01:00
Michal Kubecek 014c59260c vmnet: use standard definition of PCI_VENDOR_ID_VMWARE_VMXNET3 if available
The PCI_DEVICE_ID_VMWARE_VMXNET3 macro is defined in mainline pci_ids.h
since commit b1226c7db1d9 ("vmxnet3: Move PCI Id to pci_ids.h") in
v4.10-rc1.
2018-11-12 07:55:47 +01:00
Michal Kubecek c4a0d574ff vmnet: use standard definition of PCI_VENDOR_ID_VMWARE if available
The PCI_VENDOR_ID_VMWARE macro is defined in mainline pci_ids.h since
commit 94e57fea6202 ("PCI: Move PCI_VENDOR_ID_VMWARE to pci_ids.h")
in v3.18-rc1.
2018-11-12 07:55:29 +01:00
Michal Kubecek b71c1b9e0b import Workstation 15.0.1 module sources 2018-11-12 07:53:50 +01:00
5 changed files with 42 additions and 7 deletions

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+20 -6
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@@ -1092,8 +1092,9 @@ TaskSetCrossGDTVMM(BSVMM_GDTInit *gdt)
* TaskSetCrossGDTHost --
*
* Initializes the host portion of the crossGDT by copying it directly
* from the host kernel's GDT. We assume that all the host segments we
* will ever need come from the first page of the host's GDT.
* from the host kernel's GDT. We assume that all the host segments
* we will ever need come from the first page of the host's GDT and
* precede the lowest segment needed by the monitor.
*
* Results:
* TRUE on success, FALSE otherwise.
@@ -1105,17 +1106,30 @@ TaskSetCrossGDTVMM(BSVMM_GDTInit *gdt)
*/
static void
TaskSetCrossGDTHost(void)
TaskSetCrossGDTHost(const BSVMM_GDTInit *gdt)
{
unsigned len;
DTR64 hostGDT;
unsigned i;
/* Copy descriptors up to at most the size of the CrossGDT. */
unsigned minVMMIndex = sizeof(CrossGDT) / sizeof(Descriptor);
/*
* All copied host segment descriptors will come from the first page of
* the host kernel GDT.
* the host kernel GDT and precede the first monitor segment descriptor.
*/
ASSERT_ON_COMPILE(sizeof(CrossGDT) % sizeof(Descriptor) == 0);
ASSERT(HostIF_GlobalLockIsHeld());
for (i = 0; i < ARRAYSIZE(gdt->entries); i++) {
const BSVMM_GDTInitEntry *entry = &gdt->entries[i];
if (entry->present == 1) {
minVMMIndex = MIN(entry->index, minVMMIndex);
}
}
TaskSaveGDT(&hostGDT);
len = MIN((unsigned)hostGDT.limit + 1, sizeof(CrossGDT));
/* PR 2142795: Only copy up to at most the monitor's first descriptor. */
len = MIN((unsigned)hostGDT.limit + 1, minVMMIndex * sizeof(Descriptor));
ASSERT(len <= sizeof(CrossGDT));
memcpy(crossGDT->gdtes, (void*)HOST_KERNEL_LA_2_VA((LA)hostGDT.offset), len);
}
@@ -1157,7 +1171,7 @@ Task_CreateCrossGDT(BSVMM_GDTInit *gdt)
return FALSE;
}
memset(crossGDT, 0, sizeof *crossGDT);
TaskSetCrossGDTHost();
TaskSetCrossGDTHost(gdt);
}
populatedCrossGDT = TaskSetCrossGDTVMM(gdt);
+2 -1
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@@ -67,6 +67,7 @@ extern "C" {
#if defined (VMKPANIC)
#include "vmk_assert.h"
#else /* !VMKPANIC */
#include <linux/kernel.h>
#define _ASSERT_PANIC(name) \
Panic(_##name##Fmt "\n", __FILE__, __LINE__)
#define _ASSERT_PANIC_BUG(bug, name) \
@@ -107,7 +108,7 @@ NORETURN void Panic_NoSave(const char *fmt, ...) PRINTF_DECL(1, 2);
} while(0)
#else
NORETURN void Panic(const char *fmt, ...) PRINTF_DECL(1, 2);
#define Panic panic
#endif
void LogThrottled(uint32 *count, const char *fmt, ...) PRINTF_DECL(2, 3);
+4
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@@ -35,6 +35,8 @@
#define INCLUDE_ALLOW_VMCORE
#include "includeCheck.h"
#include <asm/processor-flags.h>
#define X86_MAX_INSTR_LEN 15 /* Max byte length of an x86 instruction. */
#define NUM_IDT_VECTORS 256
@@ -75,7 +77,9 @@
#define CR3_PDB_MASK 0xfffff000
#define CR3_IGNORE 0xFFF
#define PAE_CR3_IGNORE 0x1F
#ifndef CR3_PCID_MASK
#define CR3_PCID_MASK 0xFFF
#endif
#define CR3_NO_FLUSH (1ULL << 63)
#define CR4_VME 0x00000001
+7
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@@ -24,6 +24,7 @@
#ifndef _X86MSR_H_
#define _X86MSR_H_
#include <asm/msr-index.h>
#define INCLUDE_ALLOW_USERLEVEL
#define INCLUDE_ALLOW_VMX
@@ -127,7 +128,9 @@ MSRQuery;
#define MSR_PRED_CMD_IBPB (1UL << 0)
#ifndef MSR_MISC_FEATURES_ENABLES
#define MSR_MISC_FEATURES_ENABLES 0x140
#endif
/* Intel Core Architecture and later: use only architected counters. */
#define IA32_MSR_PERF_CAPABILITIES 0x345
@@ -652,7 +655,11 @@ typedef unsigned char MTRRType;
/*
* MISC_FEATURES_ENABLES bits
*/
#ifdef MSR_MISC_FEATURES_ENABLES_CPUID_FAULT
#define MSR_MISC_FEATURES_ENABLES_CPUID_FAULTING MSR_MISC_FEATURES_ENABLES_CPUID_FAULT
#else
#define MSR_MISC_FEATURES_ENABLES_CPUID_FAULTING 1
#endif
+9
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@@ -35,6 +35,8 @@
#endif
#endif
#include <linux/pci_ids.h>
/* LSILogic 53C1030 Parallel SCSI controller
* LSILogic SAS1068 SAS controller
*/
@@ -53,7 +55,10 @@
* VMware HD Audio codec
* VMware HD Audio controller
*/
#ifndef PCI_VENDOR_ID_VMWARE
#define PCI_VENDOR_ID_VMWARE 0x15AD
#endif
#define PCI_DEVICE_ID_VMWARE_SVGA2 0x0405
#define PCI_DEVICE_ID_VMWARE_SVGA 0x0710
#define PCI_DEVICE_ID_VMWARE_VGA 0x0711
@@ -70,7 +75,11 @@
#define PCI_DEVICE_ID_VMWARE_1394 0x0780
#define PCI_DEVICE_ID_VMWARE_BRIDGE 0x0790
#define PCI_DEVICE_ID_VMWARE_ROOTPORT 0x07A0
#ifndef PCI_DEVICE_ID_VMWARE_VMXNET3
#define PCI_DEVICE_ID_VMWARE_VMXNET3 0x07B0
#endif
#define PCI_DEVICE_ID_VMWARE_PVSCSI 0x07C0
#define PCI_DEVICE_ID_VMWARE_82574 0x07D0
#define PCI_DEVICE_ID_VMWARE_AHCI 0x07E0